One of the challenges that make embedded design interesting is finding different ways to leverage the wave of new technologies that we are seeing every day, by applying methods that have renewed applications because of the new technologies. Direct Digital Synthesis (DDS) is a method that has been around for some time in the generation of high-end multi-channel radio frequency systems, but is now seeing renewed opportunities because of the increased processor speeds and mix of analog peripherals that continue to emerge in embedded microcontrollers. This article will briefly explain the basics of DDS and its benefits when needing precise frequency control, but also how you can exploit DDS with a simple addition to its most commonly used architecture to also get high resolution amplitude control.
Most of us are familiar with the traditional analog approach of controlling frequency using a voltage controlled oscillator with analog phased-locked loop. It has worked well for many years, but has limitations in terms of stability and tuning speeds. DDS offers the ability to provide frequency control that is very accurate and can be hopped from one frequency to the next with a great deal of precision. The traditional DDS system consists of the components in Figure 1, a Numerically Controlled Oscillator (NCO) and Digital to Analog Converter (DAC).
The NCO is most easily described by first considering a unit circle with sine-wave amplitude values placed at the corresponding phase angles. A pointer is then stepped within the circle at a constant rate. Each value pointed to represents the next instantaneous sine-wave amplitude value with generated frequency Fg, where Fg is the rate that the pointer moves around the circle. The value Fg is derived by knowing the pointer stepping rate, and how big each step is. The step size can be expressed as a change in phase angle, dΦ. The pointer stepping rate is the oscillator’s sampling rate, Fs. Using the unit circle analogy, the generated frequency can be expressed as Fg = Fs x dΦ.
The analogy translates to embedded hardware designs by implementing an NCO state machine with a modulo-N counter and variable step size. The requirement for the counter / phase accumulator is programmable step size (dΦ) and feedback summing loop to produce discrete digital phase angles as an output. The digital phase angles then become pointers to a look-up table which converts the phase angles to sine-wave codes that are ready for input to the embedded DAC peripheral. Since the sampling rate, Fs, can be constant, Fg is set by the programmable dΦ register. If N represents the total register bits, and n represents the current count in the register, then dΦ is expressed as dΦ = n / 2N.
There are three major advantages for using this approach. First, very good frequency stability is achieved since the oscillator has no temperature dependent components that tend to drift over time. As a result, the NCO State Machine is as stable as the Fs input clock within, or external to, the processor. Second, very fast frequency switching times are achieved since the NCO feedback loop is updated every clock cycle, or within very few clock cycles depending on the type of embedded processor being used. This is impossible to achieve with the large divider ratios and loop settling times that are associated with conventional voltage controlled oscillator / phased-locked loop technology. Third, very fine frequency resolution is achieved since the phase register can have a large number of bits. For example, with a 32 bit dΦ register and 25 MHz sampling rate, the output frequency can be controlled within five thousandths of a Hertz resolution.
Applications for this technique include highly secure spread spectrum communication, local area networking and wide area networking communication systems because of the accurate and repeatable frequency modulation and hopping capabilities. Instrumentation and measurement systems benefit from the ability to control the spectral content of a generated waveform very accurately. There are also advantages to electro-optical systems, where injecting tightly controlled radio frequency signals into Bragg cells sets up an acousto-optic effect that can diffract (change position), shift the wavelength (change color) and by modulating the input RF power levels (amplitude modulation), also change the light intensity levels, making for a great laser light show! All of these applications benefit from precise amplitude modulation, which is another benefit of DDS technology. This is pretty straight forward to do, but not always discussed in the traditional DDS block diagrams.
High fidelity analog attenuators can be expensive to build and have trade-offs between dynamic range, resolution and switching speeds that are problematic. Figure 2 illustrates an addition to the traditional DDS system that adds high fidelity attenuation control, and can also be applied to embedded systems. The Direct Digital Attenuator (DDA) takes the NCO sine-wave code, and digitally multiplies it with a scaling code before clocking the data value into the DAC. As a result, both the DDS frequency and amplitude can be digitally controlled.
An equation which described DDS output power as a function of attenuation code is needed to establish the number of bits required for a desired fidelity / resolution. If n represents the attenuation code, and N represents the total bits in the attenuation register, then the power output P can be expressed in dB as:
Further, the resolution, or power step size, at any given attenuation code can be found by taking the derivative of P with respect to n giving:
Figure 3 shows power attenuation versus attenuation code assuming a 12 bit DDS using 2s complement DAC codes. Although output power is not linear with attenuation code, the first 1400 codes span a dynamic range of 10 dB with better than 0.01 dB resolution. This allows the use of coarse attenuators to provide 5 or 10 dB steps in order to span the dynamic range required, and the embedded processor to fill in the gaps with the higher resolution, provided by the DDS / DDA algorithm.
Using modulation domain and frequency domain analyzers, Figure 4 was constructed from screen shots of four 5MHz DDS signals spaced at 5Hz intervals and pulse width modulated with .01dB resolution. The sampling rate for each DDS was 25 MHz.
Direct digital synthesis is a powerful method for generating very stable and fast switching frequency sources. Todays embedded processors have computational engines, integrated digital to analog converters, and clocking speeds that enable DDS algorithms to be implemented in a host of embedded design applications. By digitally multiplying the output of the NCO look-up table by an attenuation value, very precise amplitude modulation can be realized over a wide dynamic range. The equations that govern how to use this capability were presented, and occammd has a signal processing tool that will allow engineers to discover the benefits of this technique for themselves. The Occammd signal processing tool is free and can be downloaded from the Occammd website (www.occammd.com). The tool can be used to experiment with the DDS algorithms in this design note, and see examples of the techniques discussed. If you have any feedback, or would like assistance with the signal processing tool download, please contact Occammd through the contact page on their website. We would be glad to assist you with your embedded designs.